求 51Pin LVDS 屏线 脚位排序定义

scjdw

现有一台康佳47寸LED为60HZ的单排线，接口类型为51Pin，换了一张120HZ的屏，用乐华120HZ的转接板,经过挑屏线至120HZ转接板，现在的情况是满屏花，好像时钟乱序，实在没办法求助，望赐教！
原屏型号为：LC470EUN SD F1

hli3276

只有找到屏规格书，才能干活吧。

hezeliuhai

Full_HD 屏（51Pin）接口定义（包含 3D）
Pin No.
Symbol
Dscription
备注
1
WP
Write enable
内部调试
2
SCL
SCL
当作Vcc时I2C使用
8、9pin
3
SDA
SDA
4
自检模式
拉高为3.3V时显示flicker图卡自检模式
内部调试
5
L/R_Out
Output signal for Left Right Glasses
control
SG同步信号
输出
6
B/L_Out
Backlight on/off control to B/L Driver
(H:B/L off;L:B/L on)
3D背光控制
信号
7
LVDS_SL
LVDS Data Format Selection
（H：JEIDA L:VESA）
8
PWM_In
Extemal PWM (from System)
使用屏调光功能时
使用
9
PWM_Out
PWM Out to System(Power Board)
10
LOCAL DIMM
H=Enable; L=Disable
调光功能开关
11
GND
GND
12
ERX0-
First pixel Negative LVDS Pair0
13
ERX0+
First pixel Positive LVDS Pair0
14
ERX1-
First pixel Negative LVDS Pair1
15
ERX1+
First pixel Positive LVDS Pair1
16
ERX2-
First pixel Negative LVDS Pair2
17
ERX2+
First pixel Positive LVDS Pair2
18
GND
GND
19
ECLK-
First pixel Negative of clock
20
ECLK+
First pixel Positive of clock
21
GND
Ground
22
ERX3-
First pixel Negative LVDS Pair3
23
ERX3+
First pixel Positive LVDS Pair3
24
ERX4-
First pixel Negative LVDS Pair4
25
ERX4+
First pixel Positive LVDS Pair4
26
2D/3D
Input signal for 2D/3D Mode Selection
2D/3D模式切换
27
L/R_In
Input signal for Left Right eye frame
synchronous
L/R帧同步信号
28
ORX0-
Second pixel Negative LVDS Pair0
29
ORX0+
Second pixel Positive LVDS Pair0
30
ORX1-
Second pixel Negative LVDS Pair1
31
ORX1+
Second pixel Positive LVDS Pair1
32
ORX2-
Second pixel Negative LVDS Pair2
33
ORX2+
Second pixel Positive LVDS Pair2
34
GND
GND
35
OCLK-
Second pixel Negative of clock
36
OCLK+
Second pixel Positive of clock
37
GND
Ground
38
ORX3-
Second pixel Negative LVDS Pair3
39
ORX3+
Second pixel Positive LVDS Pair3
40
ORX4-
Second pixel Negative LVDS Pair4
41
ORX4+
Second pixel Positive LVDS Pair4
42
NC
No Connection
43
Bit_SELE
Bit Select（L: LOW H:HIGH）
色深选择
44
GND
Ground
45
GND
Ground
46
GND
Ground
47
NC
No Connection
48
Vcc
+12V Power supply
49
Vcc
+12V Power supply
50
Vcc
+12V Power supply
51
Vcc
+12V Power supply
接口形态：FI-RE51S-HF（JAE/UJU）

hezeliuhai

120Hz 屏（51Pin+41Pin）接口定义
Pin No.
Symbol
Dscription
备注
1
WP
Write enable
内部调试
2
SCL
SCL
3
SDA
SDA
4
自检模式
拉高为3.3V时显示flicker图卡自检模式
内部调试
5
L/R_Out
Output signal for Left Right Glasses control
SG同步信号
输出
6
B/L_Out
Backlight on/off control to B/L Driver (H:B/L
off;L:B/L on)
3D背光控制
信号
7
LVDS_SL
LVDS Data Format Selection（H：JEIDA L:VESA）
8
PWM_In
Extemal PWM (from System)
使用屏调光功能
时使用
9
PWM_Out
PWM Out to System(Power Board)
10
LOCAL DIMM
H=Enable; L=Disable
调光功能开关
11
GND
GND
12
ERX0-
First pixel Negative LVDS Pair0
13
ERX0+
First pixel Positive LVDS Pair0
14
ERX1-
First pixel Negative LVDS Pair1
15
ERX1+
First pixel Positive LVDS Pair1
16
ERX2-
First pixel Negative LVDS Pair2
17
ERX2+
First pixel Positive LVDS Pair2
18
GND
GND
19
ECLK-
First pixel Negative of clock
20
ECLK+
First pixel Positive of clock
21
GND
Ground
22
ERX3-
First pixel Negative LVDS Pair3
23
ERX3+
First pixel Positive LVDS Pair3
24
ERX4-
First pixel Negative LVDS Pair4
25
ERX4+
First pixel Positive LVDS Pair4
26
2D/3D
Input signal for 2D/3D Mode Selection
2D/3D模式切换
27
L/R_In
Input signal for Left Right eye frame
synchronous
L/R帧同步信号
28
ORX0-
Second pixel Negative LVDS Pair0
29
ORX0+
Second pixel Positive LVDS Pair0
30
ORX1-
Second pixel Negative LVDS Pair1
31
ORX1+
Second pixel Positive LVDS Pair1
32
ORX2-
Second pixel Negative LVDS Pair2
33
ORX2+
Second pixel Positive LVDS Pair2
34
GND
GND
35
OCLK-
Second pixel Negative of clock
36
OCLK+
Second pixel Positive of clock
37
GND
Ground
38
ORX3-
Second pixel Negative LVDS Pair3
39
ORX3+
Second pixel Positive LVDS Pair3
40
ORX4-
Second pixel Negative LVDS Pair4
41
ORX4+
Second pixel Positive LVDS Pair4
42
NC
No Connection
43
Bit_SELE
Bit Select（L: LOW H:HIGH）
色深选择
44
GND
Ground
45
GND
Ground
46
GND
Ground
47
NC
No Connection
48
Vcc
+12V Power supply
49
Vcc
+12V Power supply
50
Vcc
+12V Power supply
51
Vcc
+12V Power supply
Pin No.
Symbol
Dscription
备注
1
NC
No Connection
2
NC
No Connection
3
NC
No Connection
4
NC
No Connection
5
NC
No Connection
6
NC
No Connection
7
NC
No Connection
8
NC
No Connection
9
GND
GND
10
ERX0-
First pixel Negative LVDS Pair0
11
ERX0+
First pixel Positive LVDS Pair0
12
ERX1-
First pixel Negative LVDS Pair1
13
ERX1+
First pixel Positive LVDS Pair1
14
ERX2-
First pixel Negative LVDS Pair2
15
ERX2+
First pixel Positive LVDS Pair2
16
GND
GND
17
ECLK-
First pixel Negative of clock
18
ECLK+
First pixel Positive of clock
19
GND
Ground
20
ERX3-
First pixel Negative LVDS Pair3
21
ERX3+
First pixel Positive LVDS Pair3
22
ERX4-
First pixel Negative LVDS Pair4
23
ERX4+
First pixel Positive LVDS Pair4
24
NC
No Connection
25
NC
No Connection
26
ORX0-
Second pixel Negative LVDS Pair0
27
ORX0+
Second pixel Positive LVDS Pair0
28
ORX1-
Second pixel Negative LVDS Pair1
29
ORX1+
Second pixel Positive LVDS Pair1
30
ORX2-
Second pixel Negative LVDS Pair2
31
ORX2+
Second pixel Positive LVDS Pair2
32
GND
GND
33
OCLK-
Second pixel Negative of clock
34
OCLK+
Second pixel Positive of clock
35
GND
Ground
36
ORX3-
Second pixel Negative LVDS Pair3
37
ORX3+
Second pixel Positive LVDS Pair3
38
ORX4-
Second pixel Negative LVDS Pair4
39
ORX4+
Second pixel Positive LVDS Pair4
40
NC
No Connection
41
NC
No Connection
接口形态：FI-RE51S-HF 和 FI-RE41S-HF（JAE/UJU）

小虎

唉，有点复杂呀，不太好看

North_HuanXu

复杂啊看不懂

scjdw

结果出来了，这个主板不没有120HZ的程序，首先必须要主板程序支持120HZ，再用转接板就可以了；
谢谢大家的帮助；

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